Table of contents
AND
Purpose: Bitwise AND
Operation: result = src1 AND src2
UOP encoding
Encoding: 0x40C
Modifiers
DSZ Modifier
DSZ8,DSZ16,DSZ32, DSZ64
Core2 issue
Core2 has sometimes DSZ modifier with value 180 (e.g. ADD.180, which seems to be similar to DSZ32)
References
Based on Intel x86 ISA
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