SM 50/40

Base system from the family of 8 and 16 bit SMEP series II modular microcomputers with the I-41 bus in Czechoslovakia. The basis of the system was developed at the Research Institute of Computer Technology in Žilina in 1980 and was supplied from ZVT Banská Bystrica from 1982 either as a kit of fitted and revived module boards in the format of 2/3 SMEP boards, or as a cassette with built-in power supplies and ventilation for 8 standard 2/3 SMEP boards with connectors and branched I-41 bus with mounted boards, or in a 19" rack with built-in power supplies and ventilation, which could be built into 19" SMEP racks, or other standard 19" racks according to IEEE for electronic devices.

The system was gradually developed and supplemented in the following years. The SM 50/40-1 microcomputer system is designed especially for machine control. devices and equipment, in the form of a terminal station for collecting and pre-processing information and in the form of a MVS 80 Microcomputer Development System for application development.

The CM 1601 terminal connected to the system

Hardware

Made 128 pcs

Memory Modules

• 16 KB DRAM, 640 ns cycle, 420 ns access
• 16 KB CMOS RAM backed up, 1100 ns cycle, 950 ns access
• 16 KB EPROM, 650 ns cycle, 550 ns access
• Combined memory up to 64 KB DRAM, cycle 600 ns, access 420 ns., and EPROM up to 16 KB, cycle 650 ns, access 550 ns, together for a total. capacity 64 KB

Peripheral Device Controllers

• SM 2151+SM 2154 RJ external memory on flexible disk (2 mechanisms), 2 x 256 KB, 250 Kbit/s
• SM 2143+SM 2158 RJ connection non-standard. PZ (sensor DP FS 1501, punch DP DT 105, mosaic printer C 2111, programmer PROM/EPROM memory PGM)

It uses a dual-board FDD controller based on the MH3000 architecture.

Communication Modules

• SM 2150: 4 serial asynchronous IRPS or S2 channels
• SM 2165: 72 parallel TTL inputs/outputs

Modules of interaction with the technological process

• SM 1350: 16-channel differential low-level analog multiplexer LLM
• SM 1352: differential program. amplifier, sampling amplifier, 12bit ADC
• SM 1353: 8x 8-bit DACs with current. or back. output A 08
• SM 1354: 4x 12-bit DAC with current. or back. output A 12
• SM 1355: 48 discrete galvanically isolated DIO inputs/outputs
• SM 1356: 8 galvanically isolated CI counter inputs
• SM 1357: 32 galvanically isolated interrupt inputs II
• SM 1358: 8 galvanically isolated pulse outputs PO
• SM 1360: 32-channel differential high-level analog multiplexer HLM
• SM 2170: 32-bit math module for DP and FP, working in parallel with the CPU

Design Microcomputer Development System (MVS 80)

The development system MVS 80 was produced in two versions. The first MVS 80-I was oriented to the sensor and puncher of punched tape and used punched tape as a storage medium, the second MVS 80-II – used a floppy disk as a storage medium and used floppy disk-based memories as an external memory. In both cases, the design of the terminal station was based on a built-in cartridge for 8 standard 2/3 SMEP boards. In addition to the boards of the CM 1601 video terminal, the processor boards, 64 KB memory, RJ external memory on a flexible disk or the control boards of the non-standard PZ emulator MVE 80 and PGM 08 type PROM/EPROM memory programmer control board. MVS 80-I development system worked under LOS MVS 80 punched tape operating system, MVS 80-II under DOS MVS 80 disk operating system, which also supported PGM type PROM/EPROM memory programmer 08. Macro assembler and BASIC compilers were also available, PL/M 80, FORTRAN 80 and PASCAL 80 for DOS MVS 80

Computers derived from SM 50/40

• PP-03 (ZVT B.Bystrica)
• TEXT01 (Aritma)
• SM 53/10 (ZVT Námestovo)

References

• Systémové programování v MS DOSu: 8. seminární školení k využití výpočetní techniky Olomouc říjen 1988, sekce C: Sborník. Olomouc: KV komitétu pro věd. řízení ČSVTS v Severomor. kraji, 1988. 72 s., Aplikační programové vybavení systému Mikros Robotron SM 50/40