TNS-NET
Contents
Network for 8-bit computers TNS GC and TNS HC-08, also called "fast line". Speed 100 kbit/s, coaxial cable max 1km, Manchester.- TNS-NET – Fast line (SIO channel A)
- Network Frame Format
- HC08 I/O ports SIO-A
- SIO-A initialization sequence (byte_9C2, 14 B)
- Slow line (current loop, SIO channel A or B)
- = Channel selection =
- = Channel initialization (serial_init_channel) =
- = Slow line frame format =
- = Control bytes =
- = CRC-16 (crc16_compute, 0x0F61) =
- = Net boot progress (HC08 netboot) =
A TNS-UPP-NET card with Z80 A SIO was produced for TNS-GC, in TNS-HC it was solved on the motherboard using Z80 SIO.
The successor to this network is TNS-NET 900 for 16-bit computers.
TNS-NET – Fast line (SIO channel A)
Byte 0: SRC_ADDR (bits5:0 = node source address, 6 bits) Byte 1: FLAGS bit7 = 0: data frame bit7 = 1: control frame (ACK/NACK/buses) bits5:0: sequence number or type of control frame Byte 2..N: Data (data frame) (CRC provides HW SIO in SDLC mode) Control frames (bit7=1, bits5:0): 0x01 (0x81): ACK – data frame correctly received 0x02 (0x82): NACK – error, retry request 0x04 (0x84): BUSY - line busy, wait
Port Direction Function ------ ----- -------------------------------------------------------------------- 0x0C R/W SIO-A Data: read = received byte, write = transmitted byte 0x0EE R SIO-A RR0: Bit0=RX ready, Bit2=TX empty, Bit5=SYNC, Bit6=DCD 0x0EE W SIO-A WRx: commands (Channel Reset, WR1–WR7)
SIO-A initialization sequence (byte_9C2, 14 B)
From bootcode HC08
Byte Value Reg Description ----- ------- ----- -------------------------------------------------------------------- 1 0xD8 WR0 Channel Reset (D7:D6=11) 2 0x40 WR0 Command (D7:D5=010) 3 0x80 WR0 Reset Rx CRC / SDLC 4 0x01 WR0 Pointer → WR1 5 0x00 WR1 No interrupt (polling) 6 0x03 WR0 Pointer → WR3 7 0xDD WR3 8-bit Rx, Rx Enable, Hunt mode, CRC enable 8 0x04 WR0 Pointer → WR4 9 0x20 WR4 1 stop bit, SDLC sync, ×1 clock 10 0x05 WR0 Pointer → WR5 11 0x61 WR5 8-bit TX, TX Enable, DTR 12 0x07 WR0 Pointer → WR7 (SDLC flag) 13 0x7E WR7 HDLC/SDLC flag byte 14 0x06 WR0 Pointer → WR6 (SDLC address) +1 own_addr WR6 Own node address (byte_926)
Slow line (current loop, SIO channel A or B)
Key Designation SIO channel Data port Status port CTC -------- --------- ---------- ---------- ----------- ----------- X Channel A SIO-A 0x0C 0x0E CTC1 ch.0 (port 0x04) Y Channel B SIO-B 0x0D 0x0F CTC0 ch.1 (port 0x01)
= Channel initialization (serial_init_channel) =
CTC: 0x45 = timer mode, /16, software trigger; time const = 0x0A (baudrate) SIO (8 B of byte_D7B): WR4 = 0x44 (×16 clock, 1 stop bit, async, no parity) WR3 = 0xC1 (8-bit Rx, Rx Enable) WR5 = 0x68 (8-bit TX, TX Enable, DTR) WR1 = 0x00 (no interrupt)
┌──────┬──────┬──────────┄ │ 01h │ SEQ │ LEN + DATA[0..N] │ ~CRC_L │ ~CRC_H │ └──────┴─────├ SOH seq. no. length N + N bytes CRC-16 complements SOH = 0x01: start of frame SEQ = unk_22E7: sequence number, increments after each block LEN = first byte of data part; CRC is calculated from [LEN, DATA...] ~CRC = bit complement of the resulting CRC-16 (lo, hi)
0x06 ACK: frame received correctly 0x15 NAK: CRC error, retry request
= CRC-16 (crc16_compute, 0x0F61) =
Input: HL = data address, B = number of bytes, DE = init value (0xFFFF) Output: DE = Resulting CRC-16 Algorithm: nibble-by-nibble XOR, CRC-16/CCITT variant (polynomial 0x1021 or 0x8005) CRC calculated from [LEN, DATA[0]..DATA[N-1]]; a bit complement is stored in the frame.
= Net boot progress (HC08 netboot) =
TNS HC-08 can boot from both slow and fast lines
1. net_setup_node_params(A) – initialization of node addresses from DIP switches 2. net_call_tx_init() – line initialization (SIO init) 3. Print "connecting..." 4. net_transceive(type=0x12) – handshake: request for SYSHC.SYS file → Error: " - communication error" → File not found: " - file cannot be opened" 5. Print "ok\nptu operating system ... " 6. Block counter initialization (unk_22C8 = 0xFFFF) 7. Block receiving loop (128 bytes each): a. net_transceive(type=0x0C) – block request b. net_print_block_counter() – printout of the "ddd" counter c. Copy of the block to the destination address (unk_22CA) d. If last block (flag in FLAGS): exit 8. Move OS to destination address (LDIR or LDDR) 9. JP (exec_addr) – transfer of OS control