SAPI R

Also called JPR-12R.Designed by Ing. Eduard Smutný.It was manufactured from 1980 (according to documentation 1980/11) by Tesla Strašnice. The computer was inspired by or was successor to PDP 11/40. Hardware is based on 74181 (PDP-11 ISA).Operating systems running on the computer: FOBOS 3,DIAMS,OSPD.

Parts of this topic may be machine translated.

Contents

Printed circuit boards

On each board with a size of 360x360mm there are 5 Edge connectors in a 2.5mm pitch of 2x18 contacts, which are connected PDP-11 Unibus bus. There are minor differences in connection between the cards, eg supply voltages. ALU and BUS cards form defacto one whole with many internal internships beyond Unibus, their connection is solved on a printed circuit board and additional wires. The front panel (PNL) is connected by wires.

System JPR 12R

(Number report a fixed position in Backplane)

boards common bus

According to the documentation between the cards, the data bus is relatively compatible, the supply voltage (GND, 5V, +18V, -18V) is again unmified.

Cabinets

Compatibility with PDP/11

Probably the copied PDP-11/05 (KD11B processor corresponds to JPR 12 R details). Interestingly, the processor is clocked using an R-C oscillator, the crystal was probably a "bourgeois relic" ;-).

Periphery

Documentation

Program control unit JPR 12 R "4xV 130 009" contains drawings ALU, BUS, DOP, PMT, DPR, ZKO, PNL
Unit Sapi-R JPN R "4xV 130 021"
Instructions for operating ZSS, OSS, VOS "4xV 130 022" contains drawings of ZSS, OSS, VOS
Semiconductor memory
Direct Access to DMA memory "4xV 130 033"
PDK Formatting Addition "4xV 120 040"

References

Back
Licensed under CC-BY-NC-SA. Last change: 2025-02-12 11:16:16
Small
Medium
Large